About me

I am a Ph.D. student in the Integrated Information Processing (IIP) group at ETH Zürich, advised by Prof. Christoph Studer.

Originally from Guatemala 🇬🇹, I received a Bachelor’s degree in Electronics Engineering from Universidad del Valle de Guatemala in 2016. Before studying abroad, I worked as a design engineer in a building automation company, Aktiva. In the Fall of 2016, I joined the VLSI Information Processing (VIP) group at Cornell University. I received a Master of Science degree from Cornell on Spring of 2020, and later that same year, I joined the IIP group at ETH Zürich. My research focuses on digital VLSI design for signal processing, wireless communication, machine learning, and emerging computer architectures.

During the Summers of 2017 and 2020, I was an intern at Xilinx, where I worked on optimizing neural networks for their implementation on hardware. In the Fall of 2017, I was a visiting researcher at ETH Zürich, where I was exposed to state-of-the-art CAD tools used for fabricating ASICs. With the knowledge acquired during this visit, I was the lead designer of our first ASIC tape-out at the VIP group: A 28nm CMOS chip containing three accelerators for massive MU-MIMO. Later in 2020, I leaded the implementation of our first mixed-signal design: A 65nm CMOS chip comprising ADCs and a spatial equalizer for a 32-antenna base-station. The ADCs and equalizer support programmable resolution to enable an adaptive, energy-efficient communication! 📡📡📡